Archive:NXP1768: Difference between revisions
Jump to navigation
Jump to search
SimonRichter (talk | contribs) (Describe NXP1768) |
SimonRichter (talk | contribs) m (Bullets) |
||
Line 5: | Line 5: | ||
== Technical == | == Technical == | ||
* ARM Cortex-M3 CPU | |||
* 512 KiB Flash | |||
* 64 KiB SRAM | |||
* Ethernet MAC | |||
* USB Device/Host/OTG | |||
* 8-channel DMA controller | |||
* 4 UARTs | |||
* 2 CAN channels | |||
* 3 SSP/SPI | |||
* 3 I2C, I2S | |||
* 8-channel 12-bit ADC | |||
* 10-bit DAC | |||
* PWM | |||
* Quadrature Encoder interface | |||
* 4 general purpose timers | |||
* 6-output general purpose PWM | |||
* Real-Time Clock with separate battery supply | |||
* up to 70 general purpose I/O pins |
Revision as of 14:41, 17 February 2014
Organizational
Contact Simon if you want to use the board.
Technical
- ARM Cortex-M3 CPU
- 512 KiB Flash
- 64 KiB SRAM
- Ethernet MAC
- USB Device/Host/OTG
- 8-channel DMA controller
- 4 UARTs
- 2 CAN channels
- 3 SSP/SPI
- 3 I2C, I2S
- 8-channel 12-bit ADC
- 10-bit DAC
- PWM
- Quadrature Encoder interface
- 4 general purpose timers
- 6-output general purpose PWM
- Real-Time Clock with separate battery supply
- up to 70 general purpose I/O pins